1. A series RL circuit containing a 0.17-H inductor has a time constant of 0.13 s. What is the resistance in the circuit? 2. A 1000-ohm's resistor is joined in series with a 400-mH inductance and a 12-V battery. (a) What is the time constant of the circuit? (b) How long will it take after the circuit is completed for voltage
Why and how does charge flow from one capacitor to another capacitor when the two are connected to each other by a conducting wire? I am not able to understand that; why and how does negative charge flow from a capacitor having lower potential difference between its plates to a capacitor having higher potential difference betwe
In the diode shown, the diodes are ideal except that each is modeled by a voltage source of 0.5V in series with a (diode) resistance of rd = 20, when forward biased. A sinusoidal signal Vs with input impedance Rs=100 is connected to the diode circuit. Determine the maximum value of Vs such that Vo remains sinusoidal, with no dis
The attached file shows the circuit in question along with information about the components (zener diode, op-amp, and BJT transistor). Problem Statement: The simple circuit shown below is a battery-charge circuit. It operates from a DC power supply having Vcc=22V. The fully charged NiCd battery pack exhibits Vb=12.08V. Opera
Problem involves a seal-in circuit with an internal relay control. Please see attached for description. I'd like to see the ladder logic diagram as to how the problems are to be diagrammed. I had only two lines of ladder logic for part a, but I think there may be more. Can anyone give me a firm understanding on this?
(i) The minimum recommended supply voltages for the 741 op-amp are V+=5V and V-=-5V. Using these lower supply voltages, calculate (a) Iref, Ic10, Ic6, Ic17, Ic13a, and (b) the voltage gains of the input and gain stages for the circuit values in the attached image. See attached file for full problem description.
Develop a state space model of a current-fed series RC circuit. Use Simulink to simulate the dynamic behaviour of a current-fed series RC circuit. What happens when you do a parameter analysis of this model? Explain your observations! The attachments are: A model of a voltage - fed series RC circuit And a model of the RC
For the circuit, design a bias stable circuit such that Icq=.8mA and Vceq=5V. Let Bf=100. Using the results, determine the percentage change in Icq if Bf is in the range of 75<=Bf<=150. Repeat this if Re=1kOhms. Rth=.1(1+b)re=.1*101*.5Kohms=5050 Ohms I can do KVL around the b-e loop to find Vth, but how do I split the two
A car battery has a rating of 245 ampere hours (Ah). This rating is one indication of the total charge that the battery can provide to a circuit before failing. What is the total charge (in coulombs) that this battery can provide?
For the circuit in Fig. P3.105, each utilizing an ideal diode(or diodes), sketch the output for the input shown. Label the most positive and most negative output levels. Assume CR.>>T. Please see the attached document.
Design a logic circuit with 4 inputs and an output. Please see the attached MS Word file for the complete problem and table.
REVISION QUESTIONS Please could you provide detailed answers from the questions below; 1. a silicon n-p-n bipolar junction (BJT) is designed with emitter, base and collector doping levels of 1019 cm-3 , 1015 cm-3 and 5 × 1017 cm-3 , respectively. Assuming the intrinsic carrier concentration (ni) in silicon to be 101
See diagrams in attached file. For each of the following circuits, determine how the brightness of the bulbs change when the switch is closed. Please see attachment Next Time Problem 3 November 2003 For each of the following circuits, determine how the brightness of the bulbs change when the switch is closed. A.
A calculator draws a current of 0.0001 A for 5 minutes. How much charge flows through it?
See attached jpg for question. Calculate capacitance, calculate voltage across each capacitor.
A security alarm for an office building door is modeled by the circuit shown. The switch represents the door interlock, and V is the alarm indicator voltage. The switch has been closed for a long time at t=0. find the voltage, v(t), for t>0 for the circuit shown. Please see attached file for circuit.
For the circuit shown in attachment, find the combined impedance of the 160 uH inductor and 10uF capacitor when w=25 M rad/s. Then find i(t) when Vs(t)=20 cos (wt+pi/4) and w=25 M rad/s.
Calculate the approximate switching time that is obtained if the output is loaded by a capacitance of 0.2 pF due to interconnections and the inputs of other gates, in the given CMOS inverter circuit.
The circuit shown in Figure B2 (in the attachment) is of a CMOS inverter driving a capacitive load. VDD represents logic level "1" and zero volts logic level "0". M1 is an nMOS device and M2 is a pMOS device. Calculate the approximate switching time that is obtained if the output is loaded by a capacitance, CL, of 0.2 pF due