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Charge flow from one capacitor to another

Why and how does charge flow from one capacitor to another capacitor when the two are connected to each other by a conducting wire? I am not able to understand that; why and how does negative charge flow from a capacitor having lower potential difference between its plates to a capacitor having higher potential difference betwe

RC Circtuit with Expulsion = 12.0 votes

Consider an RC circuit with epsilon = 12.0 V, R = 175 ohms, and C = 55.7 micro-F. Find (a) the time constant for the circuit, (b) the maximum charge on the capacitor, and (c) the initial current in the circuit.

LRC Circuits

Please refer to the attached file. How much should damping ( ) affect the result of the angular frequency for impulse response? (see attachment) In equation XVI.5, the details of the differentiation of I(t) are omitted. Take the derivative of I(t) and explicitly show how the voltage across the inductor L varies with time.

Undistorted Sinusoidal Signals in a Diode Circuit

In the diode shown, the diodes are ideal except that each is modeled by a voltage source of 0.5V in series with a (diode) resistance of rd = 20, when forward biased. A sinusoidal signal Vs with input impedance Rs=100 is connected to the diode circuit. Determine the maximum value of Vs such that Vo remains sinusoidal, with no dis

Depletion-Load NMOS Amplifier

A depletion-load NMOS amplifier and its small-signal equivalent circuit are shown in the figures. For the small signal parameters gm1=0.2 and mA/V, gm2=0.04mA/V, ro1=ro2=50k and CL= 20pF, calculate the mid-band voltage gain Vo/Vi. ==================================== a) vo/vi = -2.5 v/v b) vo/vi = -1.5 v/v c) vo/vi = -2.0 v/

Define appropriate resistor values in a battery-charger circuit

The attached file shows the circuit in question along with information about the components (zener diode, op-amp, and BJT transistor). Problem Statement: The simple circuit shown below is a battery-charge circuit. It operates from a DC power supply having Vcc=22V. The fully charged NiCd battery pack exhibits Vb=12.08V. Opera

Seal-In Circuit with Internal Relay Control

Problem involves a seal-in circuit with an internal relay control. Please see attached for description. I'd like to see the ladder logic diagram as to how the problems are to be diagramed. I had only two lines of ladder logic for part a, but I think there may be more. Can anyone give me a firm understanding on this? Thank

Wildar current source/active loads

These are two transistor problems based on textbook (Electronic Circuit Analysis and Design, 2nd ed by Neamen). See attached file for full problem description.

Op Amps

Attached is the problem and the work I've done so far. Please check to make sure it is absolutely correct and then help me understand and SOLVE the rest of the problem. **Any bottom of any circuit cutoff, it's just a horizontal line for ground w/ nothing else.

RL/RC Circuits

A series RL circuit with L = 3.00 H and a series RC circuit with C = 3.00 have equal time constants. If the two circuits contain the same resistance R, (a) What is the value of R and (b) What is the time constant?

Develop a state space model of a current-fed series RC circuit.

Develop a state space model of a current-fed series RC circuit. Use Simulink to simulate the dynamic behaviour of a current-fed series RC circuit. What happens when you do a parameter analysis of this model? Explain your observations! The attachments are: A model of a voltage - fed series RC circuit And a model of the RC

Circuit Theory Problem

Assume an infinite network made of 1nH inductors as shown. Furthermore assume that there is not mutual inductance. What is the effective inductance between points A and B? [The number only, i.e. Leff =?] (see diagram in the attached file for visual representation)

AC/DC BJT transisitor Circuit Analysis

For the circuit in the image, Beta=120, VCC=5V, Va=100V, and Rb=25kohms. Determine Vbb and RC such that Rpi=5.4kOhms and the Q-point is in the center of the load line. I have a formula for Rpi=(Vt*Beta)/Icq. From this I found Icq=1.25x10^-4 Amps. However, is this a correct way to determine Icq? The question said to d

Bias stable circuit design with capacitors

For the circuit, design a bias stable circuit such that Icq=.8mA and Vceq=5V. Let Bf=100. Using the results, determine the percentage change in Icq if Bf is in the range of 75<=Bf<=150. Repeat this if Re=1kOhms. Rth=.1(1+b)re=.1*101*.5Kohms=5050 Ohms I can do KVL around the b-e loop to find Vth, but how do I split the two

Circuit Output

For the circuit in Fig. P3.105, each utilizing an ideal diode(or diodes), sketch the output for the input shown. Label the most positive and most negative output levels. Assume CR.>>T. Please see the attached document.

Design a logic circuit

Design a logic circuit with 4 inputs and an output. Please see the attached MS Word file for the complete problem and table.

Anesthetic vaporization and controlled delivery

In a vaporizer a volatile anesthetic liquid is evaporated into a gas which eventually flows to the patient. A lot of attention is directed toward temperature maintenance in order to assure that the patient receives the proper concentration. Why is temperature control important? What methods can be used to actually control the

Fermi Energy and Circuits

REVISION QUESTIONS Please could you provide detailed answers from the questions below; 1. a silicon n-p-n bipolar junction (BJT) is designed with emitter, base and collector doping levels of 1019 cm-3 , 1015 cm-3 and 5 × 1017 cm-3 , respectively. Assuming the intrinsic carrier concentration (ni) in silicon to be 101

524 Electricity: Calculate monthly charge for running a scroll saw

CMP is installing a new transformer to supply power to my woodworking shop. Its primary side has 200 turns (110 volts), and its secondary side had 500 turns. It supplies power to the following circuit: (refer to attachment). CMP charges me $0.015 per kWhr. My scroll saw (item R3) runs for 45 hours per month. What is my month

Calculate the approximate switching time that is obtained if the output is loaded by a capacitance of 0.2 pF due to interconnections and the inputs of other gates, in the given CMOS inverter circuit.

The circuit shown in Figure B2 (in the attachment) is of a CMOS inverter driving a capacitive load. VDD represents logic level "1" and zero volts logic level "0". M1 is an nMOS device and M2 is a pMOS device. Calculate the approximate switching time that is obtained if the output is loaded by a capacitance, CL, of 0.2 pF due