Memory

In a computer context, 'memory' refers to physical devices used to store data and programs either temporarily or permanently so they can be retrieved and used when required. Every application, program and document takes up space in memory so a programmer must always be aware of memory management or else risk bugs, poor performance and vulnerabilities to malicious software and viruses.

There are a many different kinds of memory. First, it can be divided into primary and secondary memory. Primary memory is faster to access so information that is needed often for common processes is stored there. Secondary memory is the physical memory that has a higher capacity for storage but this comes with the trade-off of being slower. Primary memory stores on the secondary memory system is called virtual memory. Primary memory and CPU cache memory, which is another type of fast-access memory, are examples of what we call 'volatile memory'. Volatile memory is itself a type of semiconductor memory. Examples of non-volatile memory includes flash memory and ROM/PROM/EPROM/EEPROM memory. Volatile and non-volatile memories are the main types of semiconductor memory which operate on a system of memory cells or bistable flip-flops, each of which stores a single bit.

The size-to-storage capabilities of memory has taken some drastic leaps since the first implementation of a computer. 1940s technology could barely handle more than a few bytes at a time. The ENIAC needed thousands of octal-base radio vacuum tubes to do simple calculations of 20 numbers - truly laughable in today's world where it a memory card holding every photo you've ever taken in your life is small enough to be swallowed.

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Direct Mapped Cache

Suppose a computer using direct mapped cache has 2^32 bytes of byte-addressable main memory, and a cache size of 512 bytes, and each cache block contains 64 bytes. a). How many blocks of main memory address are there? b). What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and

Create a page translation table that meets the requirements of the virtual memory system shown below.

Create a page translation table that meets the requirements of the virtual memory system shown below. Assume a page size of 25, with pages 0 through 7 in logical memory, and frames 0 to 20 in physical memory. All numbers are in decimal. Please refer to the attachment for complete question.

A computer using direct-mapped cache has 2^24 words of main memory and a cache of 256 blocks.

1. A computer using direct-mapped cache has 2^24 words of main memory and a cache of 256 blocks. Each cache block contains 64 words. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache? (What are the sizes of the tag, block and word fields?) c) To which block will the

Memory Effectiveness

Given memory partitions of 100 kb, 500 kb, 200 kb, 300 kb, and 600 kb (in order), how would each of the first-fit, best-fit, and worst-fit algorithms place processes of 212 kb, 417 kb, 112 kb, and 426 kb (in order)?Which algorithm makes the most efficient use of memory?

Large Video Memory is Required to Store an Image During Display

A photographic image requires 3 bytes per pixel to produce 16 million shades of color. a) How large video memory is required to store a 640 x 480 image during display? A 1024 x 768 image? A 1280 x 1024 image? b) How many 1024 x 768 color images will fit on a CD-ROM?

Set Associative Cache

Please help with the following computer science problems. Provide step by step calculations. Suppose that a computer using a set-associative cache has 2^16 words of main memory and a cache of 32 blocks, where each cache block contains 8 words. A. If this cache is a 2-way set-associative, what is the format of a memory

Direct Mapped Cache

Suppose that a computer using direct-mapped cache has 2^24 words of main memory and a cache of 64 blocks, where each cache block contains 16 words. A. How many blocks of main memory are there? B. What is the format of a memory address as seen by the cache? That is, what are the sizes of the tag, block and word fields? C

Format of Memory Address for Various Cache Organizations

Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64KB of data, and blocks of 32 bytes. Show the format of a 24-bit memory address for: A. Direct Mapped Cache: word, block, tag (number of bits in decimal) B. Fully Associative Cache: word, tag (number of bits in decimal) C. 4-

Consider a memory of 64 blocks (labeled 0 through 63) and a cache of 16 blocks (labeled 0 through 15). Answer the given questions related to 2-way set associative, direct mapped and 4-way set associative layouts of the cache.

Consider a memory of 64 blocks (labeled 0 through 63) and a cache of 16 blocks (labeled 0 through 15). In the questions below, list only correct results. (i) Under 2-way set associativity, to which blocks of cache may element 31 of memory go? (ii) In the sequence of memory block references from the CPU [0,2,10,45,10,2,44,3

Cache memory and Virtual memory

Cache memory systems and virtual memory systems share certain objectives. a. Explain what a cache is and what its purpose is. Also describe what data gets placed into the cache, and when it is put there. b. Explain what virtual memory is and what its purpose is. Also describe when and how pages are moved between virt

A Program Simulating Little Man's Computer

We have to write a c++ program for Little man's computer in which Input: A text file containing machine code (not assembly code) for little man's computer following instruction set . Instructions are in different lines (no need for semicolon at the end of each instruction) Arithmetic 1xx ADD 2xx SU

Information in a Read-Only Memory (ROM)

Explain what use a read-only memory (ROM) serves in the design of a computer system. What type of information is kept in a ROM, and how does that information originally get into the memory?

Addressable Memory

32 bit computer 32 bit instruction: 2 fields:opcode field and immediate operand or operand address opcode = 1 byte wide express answer in powers of 2 1. give number of available unique instructions 2. give max indrectly addressable mem capacity in bytes. 3. give max directly addressable memory capacity in bytes. 4. give b

Addressable memory

What is meant by addressable memory capacity? What is meant by directly addressable memory capacity?

Explain Various Assembly Language Memory Read Instructions

Given the following memory values and a one-address machine with an accumulator, what values do the following instructions load into the accumulator?  Word 20 contains 40.  Word 30 contains 50.  Word 40 contains 60.  Word 50 contains 70. a. LOAD IMMEDIATE 20 b. LOAD DIRECT 20 c. LOAD INDIRE

Comparing Address Machines

Compare zero-, one-, two-, and three-address machines by writing programs to compute X = (A+B X C)/D - E X F) For each of the four machines. The instructions available for use as follows: 0 Address 1 Address 2 Address 3 Address PUSH M LOAD M MOVE (X<-- Y) MOVE (X <--Y) POP STORE M ADD (X<--X +Y) ADD (X<-

Cache access time

A single level cache has following specifications. Access time = 2.5 ns Line size = 64 bytes Hit ratio = 0.95 Main memory uses a block transfer capability, and has first word (4 bytes) access time of 50 ns and access time for following words as 5 ns. Compute the access time when there is a cache miss? Assume that the

Numerical: memory cost and hit ratio

Explain the meaning of Tc, Cc, Tm and Cm in the following memory system specification. Tc = 100 ns Cc = 10^(-4) $/bit Tm = 1200 ns Cm = 10^(-4) $/bit a. Calculate the cost of 1 MByte of main memory using the above parameters. b. What is the cost of 1 MByte of cache memory? c. If the effective access time is 10% great

Numerical: Direct Mapped Cache and Byte Addressable Memory

Given, a byte addressable main memory of 2^16 bytes and block size of 8 bytes, using direct mapped cache consisting of 32 lines. a. How many total memory bytes can be stored in the cache? b. How is a 16 bit memory address divided into tag, line number and byte number? c. Into what line would byte with the following address

Set Associative Cache: Main Memory Address Format

Given a word addressable machine, with following memory configuration. - 64 cache lines divided into 4 sets. - main memory contains 4K blocks of 128 words each. How does the main memory address format look?

Importance of RAM

What is the importance of having enough RAM? How does it relate to how fast a computer can process data from a large database residing on ones hard drive? What is the importance of virtual memory if you don't have too much RAM & how does it relate to query speeds?

Suppose three values (x, y, and z) are stored in a machine's memory. Describe the sequence of events that lead to the computation of x+y+z

Suppose three values (x, y, and z) are stored in a machine's memory. Describe the sequence of events that lead to the computation of x+y+z, How about (2x)+y?

Methods for Allocating Memory for an Array

Describe some of the methods for allocating memory for an array and describe methods for initializing an array. Please include example code that does this.

Memory Cycle Time of Time Slot Interchange Switch

In a time slot interchange (TSI) switch, 8 input lines are scanned in sequence to build up an input frame with 8 slots. The incoming lines each produce 16KBps (B=Byte). Each slot in the TSI switch holds 8 bits. What is the required memory cycle time of this switch?

Does a queue crawl through memory in the direction of its head or its tail? Explain your answer.

How many cells can be in a computer's main memory if each cell's address can be represented by two hexadecimal digits? What if four hexadecimal digits are used? Explain your answer.

Suppose three values (x, y, and z) are stored in a machine's memory

Suppose three values (x, y, and z) are stored in a machine's memory. Describe the sequence of events (loading registers from memory, saving values in memory, and so on) that lead to the computation of x + y + z. How about (2x) + y?

Specialized Instructions

Sort all the words in memory that can be considred to be decimal ASCII-coded numbers. An ASCII-coded word can vary from 3030h (00d) to 3939h (99d). Sort the ASCII words so that the smallest word is at offset 0000.

Manually Assembling Programs

Write and manually assemble the following programs. All memory addresses include the starting and ending addresses. Show comments and identified source codes. 1. Clear (place 0s) in all memory locations from 2000h to 200Ah. 2. Make every odd bit in memory addresses C000h and D000h a 0. Do not change any other bit at each ad