Purchase Solution

Cache associativity: memory and cache blocks mapping

Not what you're looking for?

Ask Custom Question

Consider a memory of 64 blocks (labeled 0 through 63) and a cache of 16 blocks (labeled 0 through 15). In the questions below, list only correct results.

(i) Under 2-way set associativity, to which blocks of cache may element 31 of memory go?

(ii) In the sequence of memory block references from the CPU [0,2,10,45,10,2,44,35,26,44,45,10], beginning from an empty cache, will layout for a direct mapped and a 4-way set associative cache differ? What will be the mappings between cache block number and memory block number in each case?

Purchase this Solution
Solution Summary

Solution gives detailed explanations as well.

Solution Preview

Memory of 64 blocks can be addressed using 6 bits address.

(i) Under 2-way set associative organization, the cache of 16 blocks will be organized in 8*2 format i.e. 8 sets of size 2 blocks each. Since each memory block has to be mapped to one unique set in this cache organization, we look at the lower 3 bits of the block's memory address, and use that to determine which cache set it will go in.

31 (decimal) = 011111 (binary)
Lower 3 bits in above address are 111, indicating that the memory block with above address will go to cache set number 7.
Assuming that the cache is currently empty, in that ...

Purchase this Solution
Free BrainMass Quizzes
Basic UNIX commands

Use this quiz to check your knowledge of a few common UNIX commands. The quiz covers some of the most essential UNIX commands and their basic usage. If you can pass this quiz then you are clearly on your way to becoming an effective UNIX command line user.

Basic Computer Terms

We use many basic terms like bit, pixel in our usual conversations about computers. Are we aware of what these mean? This little quiz is an attempt towards discovering that.

Word 2010: Tables

Have you never worked with Tables in Word 2010? Maybe it has been a while since you have used a Table in Word and you need to brush up on your skills. Several keywords and popular options are discussed as you go through this quiz.

C# variables and classes

This quiz contains questions about C# classes and variables.

Excel Introductory Quiz

This quiz tests your knowledge of basics of MS-Excel.

View More Free Quizzes
Related BrainMass Solutions

  • Cache Misses: Compulsory, Capacity and Conflict

    The associativity of the existing cache is increased Compulsory misses? Capacity misses? Conflict misses? b. The block size (both cache block and memory block size) is decreased Compulsory misses? Capacity misses? Conflict misses? c.

  • Cache: Expected access time, Address reference format

    divided by size of set (8, due to 8-way associativity) to obtain total number of sets in the cache.

  • Direct-mapped cache, Fully-associative cache

    377939 A computer using direct-mapped cache has 2^24 words of main memory and a cache of 256 blocks. 1. A computer using direct-mapped cache has 2^24 words of main memory and a cache of 256 blocks. Each cache block contains 64 words.

  • Direct Mapped Cache - Memory Blocks

    306409 Direct Mapped Cache Suppose that a computer using direct-mapped cache has 2^24 words of main memory and a cache of 64 blocks, where each cache block contains 16 words. A. How many blocks of main memory are there? B.

  • Calculations on Direct Mapped Cache

    577777 Direct Mapped Cache Suppose a computer using direct mapped cache has 2^32 bytes of byte-addressable main memory, and a cache size of 512 bytes, and each cache block contains 64 bytes. a). How many blocks of main memory address are there?

  • Dealing with memory caches

    3134 Dealing with memory caches How do we deal with a L1 cache that is Write-back Write allocate, and the L2 cache, which is a Write-through Write no-allocate?

  • Set Associative Cache

    Suppose that a computer using a set-associative cache has 2^16 words of main memory and a cache of 32 blocks, where each cache block contains 8 words. A.

  • Format of Memory Address for Various Cache Organizations

    301945 Format of Memory Address for Various Cache Organizations Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64KB of data, and blocks of 32 bytes.

  • Set Associative Cache: Main Memory Address Format

    145888 Set Associative Cache: Main Memory Address Format Given a word addressable machine, with following memory configuration. - 64 cache lines divided into 4 sets. - main memory contains 4K blocks of 128 words each.

View More Related Solutions