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Electrical Engineering

Frequency-modulated (FM) Signal

A frequency-modulated (FM) signal is by? Correlation receiver is equivalent to the matched-filter receiver? Attached pdf file.

DSP Quantisation

1. An analogue signal is to be sampled from a transducer with an output voltage range of 0 to 10 volts and operating on a 12-volt power supply. The designer has available two analogue to digital converters (ADC): a 3 bit ADC and a 4 bit ADC. For each converter: (a) Supply the quantisation levels (including zero) that are avai

8051_C program definition

Fully explain what the program does by providing manual walk-through i.e. Step through the program by hand indicating state of variables, inputs and outputs at each statement. Give a general overview of what the program does using Layman terms. (See attached word document for program details)

Peal Maximum Value of a Feedback Control System

In this attached question P(s) refers to the plant transfer function and Y(S) is the output of the system. I have also attached a schematic of how the system i think looks like. Please provide solutions to all except part c.

FIR Filter Using Parks-McClellan Algorithm

See attached word document. The problem is taken from 'Digital Signal Processing using Matlab' by Ingle/Proakis. 1. A digital signal y(k) contains a sinusoid of frequency π/2 and a zero mean unit variance Guassian noise w(k), i.e. y(k) = 2cos(π k/2) + w(k) We want to filter out the noise component using 50-th or

Magnitude and phase of Y (e j w)

Plot the magnitude and phase of a function Y (e j w) using Matlab. How do you write a Matlab file to plot the above? y(e^(jw)) = 2.5*[(1/{1+0.9e^(j(0.1*pi-w))}) + (1/{1+0.9e^(j(-0.1*pi-w))})]

DSP analog filter problem

This problem is taken from the Textbook 'Digital Signal Processing using MatLab' by Ingle/Proakis. The below system (in the attached file) acts as an analog filter. The analog signal m(t) is passed through an analog to digital converter and m(k) is the resultant discrete or digital output in the form e^(jw). The discrete sign

Determining Analytically the DTFT of Sequences

Having difficulty with determining analytically the DTFT of sequences. I have attached a word document with problems that require answering Determine analytically the DTFT of each of the following sequences. See attachment for details

CMOS inverter

Consider a CMOS inverter biased at Vdd=4V and assume the transistors are matched with Kn=Kn and Vtn=-Vtp=/2*Vdd. Derive the expression for, and calculate the noise margins. Please see attached files.

OP-Amp Probs

For the circuit shown, assume an ideal op-amp. Find vo(t). Also, find the maximum value of vo(t). See attached diagram. Show how you arrived at your answer.

What is the PIV required of the diode?

A half-wave rectifier employing a 12-V-rms 60-Hz sine-wave source and no dc load is filtered using a polarized electrolytic capacitor having a small leakage current. For diodes assumed to have a 0.7V drop independent of current, calculate the resulting output. What is the PIV required of the diode? Show how you arrived at the an

MATLAB question

Write MATLAB script(s) to plot the basic signals below in two subplots. The upper subplot should be a continuous waveform (don't do g) and the lower subplot should be a discrete plot. a) Sinusoidal waveform b) Exponential Waveform c) Damped Sinusoid d) Sinc function e) Step Function & Square Wave f) Triangle Wave g) Im

Non-inverting BiCMOS (CA3140) op-amp circuit

Consider a non-inverting BiCMOS (CA3140) op-amp shown in image 3b. If the input signal is: vi(t)=3*sinwt V Calculate the full-power bandwidth (FPBW) and small-signal bandwidth (f3db) (note :ft=6 Mhz, A0=75k) Sketch the output wave forms for the two inputs shown in image 3b2.

BJT input diff-amp stage/off-set voltage

Define the offset voltage in the op-amp circuits. Show that the expression for the offset-voltage compensation of BJT input diff-amp stage shown in figure 4 is given by: Vt*ln(ic1/Is3)+ic1R'1=Vt*ln(ic2/Is4)+ic2Rs' Determine the value of x in the potentiometer to compensate for a mismatch between active load transistors Q3

Nyquist plot and stability

What are the techniques used to make feedback system stable? Explain and draw the frequency response of a 1-pole feedback amplifier. In a 3-pole feedback amplifier the loop gain is given by: t(f)=(Beta*100)/ ( (1+j*(f/10^4)) * (1+j*(f/10^5))^2 ); Determine the stability for Beta=.5 and .05. Sketch the Nyquist p

Avf, Rif, and Rof

Derive the expressions for closed-loop gain Avf, input resistance Rif, and output resistance Rof of the following image.

Filter design and sine-waves

Considering x[n]=1+sin((3*pi*n)/8 + pi/4) + cos ((9*pi*n/24) + pi/4) , please design a filter that will pass the sine-wave portion, but ignore everything else. What is the filter's input response h(t)? In a real filter, what would you have to do differently? Thanks.

Fourier Coefficient

Please work through attached problem and let me know how you did it. Thank you.

Op am

Describe the operation and the characteristic of the general-purpose 741 op-amp provided in the attached file. i) Derive and calculate overall gain. ii) Determine the unity-gain bandwidth iii) Compare between BJT (741) op-amp and BiCMOS (CA3140) op-amp.

Ladder Logic Exercise

Please redraw the equivalent ladder logic diagram used to implement the hardwired circuit drawn in figure 5-48 (see attachment), wired using: a. A limit switch with a single NO contact connected to the PLC input module. b. A limit switch with a single NC contact connected to the PLC input module. Assuming the hardwired cir

Ethernet Switching

1. A user message is split into 15 frames, each of which has an 80% chance of arriving error-free. If no error control is used by the data link layer, how many times must the message be sent on the average to get the entire message through? 2. A communication channel has a bit rate of 14 kbps and an one-way propagation delay

Differential Amplifier Design

Please work the problem and explain how you found the necessary values. Thank you. Design a differential amplifier as shown in Figure 11.28 incorporating a basic two transistor current source to establish Iq. The bias voltages are V+=15V and V-=-15V, the transistor parameters are Beta=180 and Va=100V, and the maximum forwar

Mosfet Amplifiers

Hi, these are practice tests and I really need to learn how to do them. Could you please help me understand and solve the entire problem? Any part of the bottom of any graph cutoff is merely a horizontal line showing ground w/ nothing else.