# Require assistance with homework

(a) How many check bits are needed if the Hamming error correction code is used to detect single bit error in a 5602-bit data word? Show procedures to support your answer.

(b) In a system bus, data lines, address lines, and control lines are separated. Why?

(c) How many base-3 digits does it take to obtain as many combinations as can be done with 10 binary digits?

(d) Suppose we have the instruction LOAD 800. Assume that register R1 contains a value of 400 and the memory contains the following values:

Address Memory Content

800 1400

. 1200

900 1000

. 1500

1000 500

. 600

1200 700

. 850

1400 900

. 880

Assuming register R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator and fill in the table below.

Mode Value Load into AC

Immediate

Direct

Indirect

Indexed

Consider the following Boolean truth table:

W X Y Z F(w,x,y,z)

0 0 0 0 1

0 0 0 1 1

0 0 1 0 1

0 0 1 1 1

0 1 0 0 0

0 1 0 1 0

0 1 1 0 1

0 1 1 1 1

1 0 0 0 1

1 0 0 1 0

1 0 1 0 1

1 0 1 1 0

1 1 0 0 1

1 1 0 1 1

1 1 1 0 1

1 1 1 1 1

(a) Express the Boolean function F(w,x,y,z) in sum-of-products form.

(b) Use Boolean algebra (and the Boolean equalities) or the Karnaugh map to simplify the Boolean expression. Add a column to the truth table to demonstrate that the simplified expression leads to the same function output values.

(c) Draw the logic diagram for the simplified circuit if each logic gate can have at most two inputs. Assuming a propagation delay of 10ns per logic gate, what is the total maximum propagation time through the simplified circuit?

Single error detection (SED) and a single error correction (SEC) for a 10-bit data word are required. Assume the data word bits are named by M1, M2, ..., M9, and M10 and it is given that four check bits, C1, C2, C4, and C8, are required and even parity is used.

(a) Develop a SED/SEC code for the 10-bit data word.

(b) Use the developed code to detect/correct the following input data containing 14 bits,

Bit Position 14 13 12 11 10 9 8 7 6 5 4 3 2 1

M10 M9 M8 M7 M6 M5 C8 M4 M3 M2 C4 M1 C2 C1

Received Input Data 0 1 1 1 0 1 0 1 0 0 1 1 0 1

The received input data contains four check bits disposed at the bit positions 1, 2, 4, and 8.

Where is the error bit within the input data? How do you correct it?

(c) Use the developed code to detect/correct the following input data containing 14 bits,

Bit Position 14 13 12 11 10 9 8 7 6 5 4 3 2 1

M10 M9 M8 M7 M6 M5 C8 M4 M3 M2 C4 M1 C2 C1

Received Input Data 1 0 1 1 0 0 0 1 0 0 1 0 1 1

The received input data contains four check bits disposed at the bit positions 1, 2, 4, and 8.

Where is the error bit within the input data? How do you correct it?

(a) Write the following expression in postfix (Reverse Polish) notation.

Y = [A+ B*L + C*(D/E - F)] / (G + H*K - M)

(b) Write a program to evaluate the above arithmetic statement using zero-address instructions so only pop and push can access memory.

Assume we are using a simple model for floating point representation. The representation uses a 14 bit format, 5 bits for the exponent with a bias of 16, a normalized mantissa of 8 bits, and a single sign bit for the number. Show how the computer would represent the numbers 106.5 and 0.8125 using this floating-point format.

MARIE Architecture

Binary, two's complement

Stored program, fixed word length

Word (but not byte) addressable

4K words of main memory (this implies 12 bits per address)

16-bit data (words have 16 bits)

16-bit instructions, 4 for the opcode and 12 for the address

16-bit accumulator (AC)

16-bit instruction register (IR)

16-bit memory buffer register (MBR)

12-bit program counter (PC)

12-bit memory address register (MAR)

8-bit input register

8-bit output register

What does the following MARIE program do? Summarize the functionality of the program. Add comments to the instructions in the program to explain what each instruction does.

ORG 100

Load C

Store X

Load D

Store Y

JnS S1

Load S

Store E

Load A

Store X

Load B

Store Y

JnS S1

Load S

Store F

Load E

Subt F

Halt

A, Dec 7

B, Dec 8

C, Dec 9

D, Dec 10

X, Dec 0

Y, Dec 0

Ctr, Dec 0

One, Dec 1

E, Dec 0

F, Dec 0

S, Dec 0

S1, Hex 0

Load Y

Store Ctr

Clear

Store S

L, Load S

Add X

Store S

Load Ctr

Subt One

Store Ctr

SkipCond 400

Jump L

JumpI S1

END

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