How to design a logic configuration which will operate, on a bit-by-bit basis, and determine the correct comparison after n(=4) clock pulses.
XILINX (programme) can be used to design such configuration.
If any one can help me with this, I would be very grateful, Thank you in advance.
(See attached file for full problem description)
This solution provides a diagram and description for designing a logic configuration.
Ripple up counter - Logic Design
Using positive edge-triggered D-type bistables with clear and preset terminals (74LS74) and some logic, design a MOD-6 ripple-up (0,1,2,3,4,5,0...) counter that can also be manually reset with an external push button.
1. Draw the circuit block diagram, labelling the LSB & MSB.
2. Ignoring the generation of glitches, briefly explain how the circuit works.
3. Draw the count sequence showing the effects of propagation delay.