# Circuit/Network Analysis

1) Thevinin Equivalent using source equivalent method

2) Superposition Theorem

https://brainmass.com/engineering/electronic-engineering/circuit-network-analysis-568413

#### Solution Preview

As circuit diagrams are involved in the explanation please FIND ATTACHMENT to refer complete solution.

1. SOLUTION BY THEVININ EQUIVALENT CIRCUIT

Analysis of the linier DC circuit by Thevinin's theorem involves two main steps, (i) Finding equivalent voltage across load terminals when load resister is kept open, this equivalent voltage is called Thevinin voltage (VTH), it is also called open-circuit-voltage; and (ii) Finding equivalent resistance across load terminals when load resister is kept open and all sources are removed, this resistance is called Thevinin Resistance (RTH).

(i) Finding equivalent voltage across load terminals when load resister is kept open, this equivalent voltage is called Thevinin voltage (VTH):

On removing load resistance the circuit will be like below.

Here, VTH = VCD ( As no current will flow through R3 (5 k-ohm) resister)

{Circuit Diagram, See attachment}

In order to calculate equivalent voltage first we should consider loop 'EGHF' on the left. Both branches GH & EF resisters of 10 k-ohms are connected to parallel to each other. So the current 2mA applied by current source will be divided by 2 for branch GH & EF giving current 1mA trough both the branches. Now in figure we observe see that the voltage applied by current source is opposite to V1, V2 and V3 as current 2mA is flowing in opposite direction through V3 & 1mA trough V1& V2, in a manner such that these tree sources are being charged by current source. And current flowing through V3 is 2mA (i.e. I = 2 mA) and through V1, V2, R1 & R3 is 1mA(i.e. i = 1 mA).

We can now use the power conservation low, Input Power provided by current source is equals to the ...

#### Solution Summary

Step wise methods are explained with aid of circuit diagrams. Both Thevinin and Superimposition Theorem are used to find Voltage across load resistance.