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    DSP Quantisation

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    1. An analogue signal is to be sampled from a transducer with an output voltage range of 0 to 10 volts and operating on a 12-volt power supply. The designer has available two analogue to digital converters (ADC): a 3 bit ADC and a 4 bit ADC. For each converter:

    (a) Supply the quantisation levels (including zero) that are available. Do this for both the three and 4-bit ADC in table form.
    (b) What is the resolution of each quantizer?
    (c) What is the maximum quantisation error?

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    https://brainmass.com/engineering/electrical-engineering/dsp-quantisation-levels-23049

    Solution Preview

    (a)
    quantisation levels: (assuming a linear ADC)

    3-bit ADC: 2^3 = 8 levels (level 0 to 7); divide 10V by (8-1=) 7 since 0 V represents level 0 and 10 V represents level 7.

    Bits
    2 1 0 QU. Level(V)
    - - - ------------
    0 0 0 0.0
    0 0 1 1.43
    0 1 0 2.86
    0 1 1 4.29
    1 0 0 5.71
    1 0 1 7.14
    1 1 0 8.57
    1 1 1 10.0

    4-bit ADC: 2^4 = 16 levels (level 0 to ...

    Solution Summary

    The solution gives clear steps to finding the quantisation levels (three and 4-bit ADC in table form), resolution of each quantizer and maximum value of the quantisation error for the analogue-to-digital converter described.

    $2.19

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