a circuit contains two devices that are connected tin parallel
a circuit contains two devices that are connected in parallel. if the resisstances of one of these devices is 12ohms and the resistance of the other divice is 4ohms, the total resistance of the two devices is? (a) 0.0625 (b) 0.333 ohms (c) 3 ohms (D) 16 ohms ?
Complimentary output rectifier voltage output wave-forms
In the complementary output rectifier, If Vs=26*sin 2*pi*60*t Volts, sketch the output waveforms vo+ and vo- versus time, assuming Vgamma=.6V for each diode. I don't understand the graphic questions. Will there ever be a time when the voltage goes negative? because it looks like a FWR. Thanks
Rearrange formula (charging battery)
A battery is charged. The relationship between the charging current, i amperes and the time, t hours passed, is given by the formula: i = 3 e to the power of -0.36 t Show the formula for i can be rearranged to give the time t as t= 1 divided by 0.36 log e (3/i) Show all steps of working this out please!
Basic Bipolar Junction Transmitter
In a common base configuration, the collector is connected to ground through a 5V source and a 2kOhm resistor. The emitter is driven with a constant-current source. Betaf=120. The collector-emitter voltage is Vce=2v. Determine ic, ib, and ie. Doing KVL around the CE loop, I get ib=1.25x10^-5Amps. However, the book gets . ...continues
DC analysis of transistor circuits
The current gain of the transistor is Beta=75. Determine Vo for [i] Vbb=0, [ii]Vbb=1V, and [iii] Vbb=2V. I'm confused on how to incorporate the load resistance in the KVL calculations. Thank you.
multi-stage transistor circuit analysis
For each transistor, Beta=120 and the B-E turn on voltage is .7V. Find the quiescent base, collector, and emittter current in Q1 and Q2. Also, determine Vceq1 and Vceq2. For the first stage, in the dc analysis I ignored the coupling capacitor and did a Thevenin equivalent resistance/voltage. I did KVL around the BE loop an ...continues
Theveninization of a transisor circuit
Find Icq and Vceq for the circuit when Beta=100. I put the 60k and 30 k resisters in parallel and then did a thevenin equivalence on the parallel combination resistance and the 20k ohm resistor. Then, I did kvl around the b-e loop and got icq=.021ma and vce=.39v. Did I do the thevinin equivalence correctly?
bias stable transisor design problem
The DC load line and Q point of the circuit are shown next to the circuit. For the transistor, Beta=120. Find Re, R1, and R2 such that the circuit is bias stable. Is it valid for me to do a KVL around the C-E loop using ic=4.8ma and vce=6v (ie=ic (b+1/b)) to find RE? And then get Rth=.1(1+beta)*Re? I know I can just arb ...continues
bias stable circuit design with capacitors
For the circuit, design a bias stable circuit such that Icq=.8mA and Vceq=5V. Let Bf=100. Using the results, determine the percentage change in Icq if Bf is in the range of 75<=Bf<=150. Repeat this if Re=1kOhms. Rth=.1(1+b)re=.1*101*.5Kohms=5050 Ohms I can do KVL around the b-e loop to find Vth, but how do I split the two ...continues
Redesign the circuit showin using Vcc=9V such that the voltage drop across Rc = 1/3VCC and the voltage drop across Re=1/3VCC. Assume Bf=100. the quiescent collector current is to be IcQ=.4mA and the current through R1 and R2 should be approximately .2Icq. Replace each transistor with the closest standard value. What is the v ...continues